Process scaling has normally been performed on a lithographic basis, but as processes dip below 32nm there are optimization options beyond the lithographic and area reduction. The Common Platform ...

As process nodes shrink towards nanotechnology, the supply voltage is scaled down to protect the device from excessive electric field across the gate oxide and the conducting channel. Another reason ...

My last article introducing Altera's plan to offer the world's first 28 nm COTS FPGA for space applications generated a lot of interest within our industry and I have received many emails from readers ...

MILPITAS, Calif.--(BUSINESS WIRE)--GLOBALFOUNDRIES today introduced the industry’s first 28nm silicon-validated signoff-ready digital design flows to help chip designers deliver the next generation of ...