Doubling the performance of the previous release, Version 6.2 of Active-HDL is an integrated, Windows-based HDL design and simulation environment. Behavioral, gate-level, and timing simulation ...
Mixed HDL/C-Language design for FPGAs recently debuted, courtesy of Aldec Inc. and Celoxica Ltd. The Active-HDL+C integrated FPGA design environment combines Aldec's Active-HDL design entry and ...
The purpose of DO-254 (formally known as RTCA/ DO-254 or ED80) is to provide guidance for the development of airborne electronic hardware. The Federal Aviation Administration (FAA), European Aviation ...
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