TechRepublic

FPGA Implementation of a New Parallel FIR Filter Structures

In recent days filters with large lengths are started to use. So parallel processing is essential at any cost. In this paper, the authors propose new parallel FIR filter structures, which are ...
Hackaday

FIR filter

Digital filters are always an interesting topic, and they are especially attractive with FPGAs. [Pabolo] has been working with them in a series of blog posts. The latest covers an 8th order FIR filter ...
EDN

FIR Filters and FFTs with 28-nm Variable-Precision DSP Architecture

Across a range of applications, the two most common functions implemented in FPGA-based high-performance signal processing are finite impulse response (FIR) filters and fast Fourier transforms (FFTs).
EDN

Analyze DSP designs in FPGAs with the z-transform

Crafting DSP algorithms for optimum performance in hardware often requires sophisticated design techniques, such as pipelining and overclocked control logic. Such is the case for implementations using ...
Nature

FIR Filter Design and Optimization Techniques

The design of finite impulse response (FIR) filters remains a cornerstone of digital signal processing, with ongoing efforts to refine both the algorithmic and hardware aspects of their implementation ...
Design-Reuse

Mapping LMS Adaptive Filter IP Core to Multiplier-Array FPGA Architecture for High Channel-Density VOIP Line Echo Cancellation

The LMS adaptive filter is the main functional block in high channel-density line echo cancellers for VOIP. In this paper, we describe an LMS adaptive FIR filter IP and estimate its performance when ...