SiFive To Integrate Nvidia NVLink Fusion For Next-Gen AI Data Center Chips

SiFive has announced a partnership with Nvidia to integrate Nvidia’s NVLink Fusion interconnect technology into its ...
Forbes

RISC-V Gains Momentum As EDA & AI Chip Design Leader Announces New IP

Forbes contributors publish independent expert analyses and insights. Marco Chiappetta is a technologist who covers semiconductors and AI. In recent years, the RISC-V architecture has gained ...

Bolt wants to take on Nvidia by building a RISC-V graphics processor

Bolt Graphics is pressing ahead with its plan to challenge Nvidia and AMD by building a graphics processor around a RISC-V ...
Design And Reuse

T2M Presents TGE100 RISC-V CPU Core: Ultra-Low-Power Computing for Area-Constrained IoT and MCU Platforms

T2M is a trusted global provider of semiconductor IP cores and ASIC Services, empowering accelerated development across various applications. In addition to that, T2M ‘s broad silicon IP Core ...
Design And Reuse

Quintauris Demonstrates RISC-V Innovation in Automotive at CES

Quintauris, a leading provider of RISC-V solutions, announced a strategic collaboration with Synopsys, the leader in engineering solutions from silicon to systems. This collaboration aims to secure ...
Semiconductor Engineering

Increasing Design Flexibility With RISC-V-Based Processor IP

The semiconductor industry increasingly needs more flexible and scalable processor architectures, driving the growing adoption of RISC-V. Originally developed at the University of California, Berkeley ...

China’s SpacemiT to launch server-class RISC-V processor after raising US$86 million

CEO Chen is betting on Edge AI - which can run AI algorithms locally rather than in the cloud - to boost the adoption of RISC ...
Electronic Design

Looking at RISC-V Implementations

This TechXchange examines various platforms the utilize the RISC-V instruction set and architecture. This includes boards and modules as well as chips. SiFive put one of its RISC-V designs on a ...
Seeking Alpha

Arteris and SiFive Partner to Accelerate RISC-V SoC Design of Edge AI Applications

Arteris (AIP) and SiFive partnership enhances the interoperability of leading RISC-V processor IP with leading system IP Focus on accelerating Edge IP consumer electronics and industrial applications ...
Machine Design

Engineering Academy Tackles RISC-V in Next Educational Event Installment

The Sept. 8 learning event from Electronic Design will feature in-depth coverage of RISC-V architecture, hardware, software and a robust panel discussion. The open-source RISC-V instruction set ...
EDN

RISC-V venture in Germany to accelerate design ecosystem

Nearly a month before Arm’s $60 billion-plus IPO, here comes a significant threat to its CPU design and licensing business. Especially when the Cambridge, UK-based processor architecture powerhouse is ...
Electronic Design

RISC-V Serves Up Open-Source Possibilities for the Future

What is RISC-V? The basics of RISC-V. Applications and uses of RISC-V. RISC-V is described as an open standard instruction set architecture (ISA) that's based on the reduced instruction set computer ...